In May 2010 I finally received my doctorate! I am currently working at the Naval Research Lab, Stennis Space Center.
My past research at LSU involved designing a robust instruction set with minimal hardware demand. PRECISE (Process Register Extensions for Collapsed Instruction Set Encoding) attempts to reduce instruction pressure in a system by reducing the binary demand of the instruction set. I worked under the guidance of its contriver, Thomas Sterling, and Maciej Brodowicz. In Spring 2008 we published Improving Code Compression using Clustered Modalities in the proceedings of the 46th ACM Southeast Conference. The official citation can be found here. You may find the slides of the presentation here.
I also researched enabling architecture with the Xilinx ML506 evaluation platform. I enabled the sending and receiving of an Ethernet packet to and from the copper+RJ45 using an example design from the Tri-mode Ethernet MAC IP. Though getting the design to work requires only several changes, they are not necessarily intuitive due to lack of documentation. If you have access to the PX SVN, you can see the MII implemented design here.
Under the guidance of my major professor David M. Koppelman, my doctoral research is in conventional CPU core architecture. It addresses an inherent overhead of control independence exploitation called branch weakening. In Spring 2010 I published a 4-page introductory paper in the Ph.D. Forum of the International Parallel and Distributed Processing Symposium. A citation can be found here. My completed dissertation may be found in the LSU ETD.
I gave my first lecture in Fall 2008 on the C programming language. You can find slides and the supplementary code here.