Maciej Brodowicz received M.S.E.E. from the Warsaw University of Technology (Poland) in 1991, M.S. in Computer Science from University of Houston in 1994 and Ph.D. in Computer Science from University of Houston in 1998. He was employed at the California Institute of Technology as a postdoctoral scholar and later promoted to the research staff position. At Caltech, he was involved in a Scalable I/O framework developing I/O algorithms for the ASC program, investigated scalability of parallel applications on supercomputers, and, in collaboration with the Jet Propulsion Laboratory, designed micro-architecture and a hardware emulator for the MIND implementation of the Processor-In-Memory concept.
Maciej's research interests at CCT include advanced computer architecture, parallel execution models, architectural and fuctional simulation, performance monitoring and prediction, scalable I/O subsystems and strategies, parallel application development and frameworks, and operating and runtime systems.
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